Portable C code
The parts of ocrypto that are not speed-critical are implemented in portable C89 code.
Assembly-language optimizations
For the following instruction set architectures, ocrypto provides optimized assembly-language implementations of the performance-critical functions, for 32-bit processor cores:
| Instruction set architectures | Processor cores (examples) |
| ARMv5-TE | ARM9E-S, ARM9EJ-S |
| ARMv6 | ARM1176 (e.g., as on Raspberry Pi Zero) |
| ARMv6-M | Cortex-M0/M0+ |
| ARMv7-M | Cortex-M3 |
| ARMv7E-M | Cortex-M4/M7 (two variants: with/without FPU) |
| ARMv8-M Baseline | Cortex-M23 |
| ARMv8-M Mainline | Cortex-M33/M35P (four variants: with/without DSP, with/without FPU) |
| ARMv7-A | Cortex-A7 |
| ARMv8-A (T32) | Cortex-A53/72 (e.g., as on Raspberry Pi 3/4 Model B using a 32-bit OS) |
| MIPS32R2-LE | MIPS microAptiv UP without DSP, little endian |
| MIPS32R2-LE-DSP | MIPS microAptiv UP with DSP, little endian |
| MIPS32R2-BE | MIPS microAptiv UP without DSP, big endian |
| MIPS32R2-BE-DSP | MIPS microAptiv UP with DSP, big endian |
Supported compilers are GCC, and for Cortex-M additionally Keil and IAR.
If no assembly-language optimizations are used, make sure that your C compiler only emits constant-time add and multiply operations.